Page 1 of 7
Journal for Studies in Management and Planning
Available at http://edupediapublications.org/journals/index.php/JSMaP/
e-ISSN: 2395-0463
Volume 02 Issue 11
November 2016
Available online: http://edupediapublications.org/journals/index.php/JSMaP/ P a g e | 146
Reliability of Low-Power Multiplier Design Using a Duplicate Collective Plate
in Development
1 Vanamala Ashish Kumar,
2 Mrs.G.Satya Prabha
1
PG Scholar, Department of ECE, SLC's Institute of Engineering and Technology, Piglipur Village, Hayathnagar Mandal, Near
Ramoji Film City, Ranga Reddy District, Hyderabad, Telangana
2Assistant Professor, Department of ECE, SLC's Institute of Engineering and Technology, Piglipur Village, Hayathnagar Mandal,
Near Ramoji Film City, Ranga Reddy District, Hyderabad, Telangana
.
ABSTRACT:
In this paper, the area of efficiency
multiplier put a sign suggests a fixed width
through a replica redundancy through
adoption My tolerance for noise (ANT)
architecture with a multiplier of fixed width
to build a redundancy version precision
cutting Masa (RPR). ANT proposed
architecture can meet the demand for high
precision, low power consumption, and
region Efficiency. RPR fixed-width design
with error compensation through the circles
of the possibilities and statistical analysis.
use the When a partial product of the correct
input vectors and vectors fixed in the palace
and put in place to reduce truncation errors,
hardware Failure holding circuit can be
simplified compensation. The multiplier
ANT 16 Ă— 16 bits, the circuit area in our
RPR fixed width It may be less, energy
consumption in the design of ants can be
saved as compared with the ANT state of the
art design.
Keywords: Algorithmic Noise Tolerant
(ANT), Fixed-Width Multiplier, Reduced- Precision Replica (RPR), Voltage Over
Scaling (VOS), Error Tolerant
Adder(ETA),Main Digital Signal
Processing(MDSP)
INTRODUCTION:
The rapid growth of mobile and wireless
systems In recent years, the need for systems
pushing ultra-low energy. To reduce power
dissipation, and measuring the voltage. [1] It
is widely used as a technology of low energy
efficient, and Power consumption in CMOS
circuits game The square of the supply
voltage. However, in the semi-depth
micrometer process technologies, has raised
the problems of noise interference Difficulty
in design and efficient reliable
microelectronic Systems, and therefore,
Page 2 of 7
Journal for Studies in Management and Planning
Available at http://edupediapublications.org/journals/index.php/JSMaP/
e-ISSN: 2395-0463
Volume 02 Issue 11
November 2016
Available online: http://edupediapublications.org/journals/index.php/JSMaP/ P a g e | 147
design techniques to improve the noise
Tolerance has developed a large scale [2] -
[8]. Aggressive low energy technology,
referred to as the voltage across the
dimensioning (VOS), and aim to reduce the
supply volt age out critical supply voltage
without sacrificing productivity. However,
VOS lead to a sharp deterioration in the
signal to noise ratio, Ratio (SNR). My novel
noise tolerant (ANT) The combination of
technology VOS main block with low
resolution Copy (RPR), who is struggling
with software bugs effectively, while
Achieve significant energy savings. Some
ANT deformation The designs presented in
[5] - [9] The design concept is ANT
Extended system level. However, the design
of RPR ANT is intended, and that is not
easy Adopted and repeatedly. RPR designs
in ANT designs can work on Too fast, but
the hardware complexity is also Complex as
shown in Figure 1. As a result, the design
RPR ANT design design is still the most
popular because of its Simplicity. However,
with the adoption of RPR must still pay In
the additional area and power consumption.
In this work, We also suggest an easy way
by using a fixed-width RPR To replace the
block RPR full width. The use of a fixed
width RPR, a miscalculation can be
corrected with low Energy consumption and
low overhead region. we use Probability and
statistics, and a partial analysis of the
product weight Finding a company about
compensation for greater accuracy RPR
design. In order not to increase the critical
path delay, Restricting compensation circuit
in the RPR should not be Located
on the critical path. As a result, we
can achieve ANT is designed with
the small area of the circle, low
power Consumption, supply voltage
and less critical
ANT multiplier design proposed
US-ING A fixed-width RPR
In this paper, we have proposed, and the
width RPR-fixed Rip place a total width of
blocks RPR ANT design [2], It is shown in
Figure 2, which can not only provide the
highest Account accuracy, low power
consumption, low Above the area of the
RPR, but also carried out with high SNR,
The effective area and the tension of the
lower layer sup operation and low power
Page 3 of 7
Journal for Studies in Management and Planning
Available at http://edupediapublications.org/journals/index.php/JSMaP/
e-ISSN: 2395-0463
Volume 02 Issue 11
November 2016
Available online: http://edupediapublications.org/journals/index.php/JSMaP/ P a g e | 148
consumption to achieve more ANT
architecture. We demonstrate our wide
design based on RPR fixed ANT ANT
multiplier. Constant width designs usually
DSP applications applied to prevent the
growth of countless little
To show. Court n bits least
significant bit (LSB) output is
popular solution for the construction
of a fixed width with n bits DSP The
inputs and outputs n bits. Hardware
complexity and power DSP
consumption of a fixed width is
usually about half One full length.
However,truncated LSB results pane
In rounding error, you need to
compensate specifically. Many of
Arts offer to reduce truncation Error
correction with the value of
continuing with the correct variable
Value. The complexity of the circuit
to compensate for a fixed The
corrected value can be simpler than
the variable Correction value.
However, approaching the correct
variable Usually more accurate,
method of compensation is
truncation error compensation
between longitudinally Multiplier
and fixed-width multiplier. However,
in RPR has a fixed width of the
multiplier ANT, compensation A
mistake we have to correct is the
general truncation error MSDP mass.
On the contrary, we have a method
of compensation for truncation error
compensation between longitudinally
MSDP multiplier and fixed-width
multiplier RPR. Currently, there are
a lot of fixed width multiplier
Designs applied to the complications
of full width. However, there It is not
yet fixed width design RPR applied
to the ANT multiplexed designs. To
achieve more accurate Error
Compensation, which offset
